IMPORTANT LINKS

Library Timings

University Library

8.30 a.m. to 5.30 p.m. on working days

8.30 a.m. to 1.30 p.m. on Saturdays

PG Library

8.00 a.m. to 8.00 p.m. on working days

8.00 a.m. to 6.00 p.m. on Saturdays

AIMIT Library

8.00 a.m. to 6.00 p.m. on working days

9.00 a.m. to 1.00 p.m. Sunday & other holidays

Normal view MARC view

System design (Topical Term)

Number of records used in: 1

Preferred form: System design

Machine generated authority record.

Work cat.: (OSt)189574: Pedroni, Volnei A. 196784, Circuit design with VHDL /, 2009.