Verilog digital system design: rt level synthesis testbench and verification. Rt level synthesis testbench and verification.

Navabi, Zainalabedin Navabi.

Verilog digital system design: rt level synthesis testbench and verification. Rt level synthesis testbench and verification. - 2 - New Delhi Tata McGraw Hill Publishing Company Ltd 2008 - xvi,384

9780070252219


Digital Systems

621.395 NAVZ